tdtbfq-ff-mac-scheduler.h

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/*
 * Copyright (c) 2011 Centre Tecnologic de Telecomunicacions de Catalunya (CTTC)
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation;
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 *
 * Author: Marco Miozzo <marco.miozzo@cttc.es>
 * Modification: Dizhi Zhou <dizhi.zhou@gmail.com>    // modify codes related to downlink scheduler
 */
 
#ifndef TDTBFQ_FF_MAC_SCHEDULER_H
#define TDTBFQ_FF_MAC_SCHEDULER_H
 
#include <ns3/ff-mac-csched-sap.h>
#include <ns3/ff-mac-sched-sap.h>
#include <ns3/ff-mac-scheduler.h>
#include <ns3/lte-amc.h>
#include <ns3/lte-common.h>
#include <ns3/lte-ffr-sap.h>
#include <ns3/nstime.h>
 
#include <map>
#include <vector>
 
// value for SINR outside the range defined by FF-API, used to indicate that there
// is no CQI for this element
#define NO_SINR -5000
 
#define HARQ_PROC_NUM 8
#define HARQ_DL_TIMEOUT 11
 
namespace ns3
{
 
typedef std::vector<uint8_t> DlHarqProcessesStatus_t;
typedef std::vector<uint8_t> DlHarqProcessesTimer_t;
typedef std::vector<DlDciListElement_s> DlHarqProcessesDciBuffer_t;
typedef std::vector<std::vector<struct RlcPduListElement_s>>
    RlcPduList_t;                                           // vector of the LCs and layers per UE
typedef std::vector<RlcPduList_t> DlHarqRlcPduListBuffer_t; // vector of the 8 HARQ processes per UE
 
typedef std::vector<UlDciListElement_s> UlHarqProcessesDciBuffer_t;
typedef std::vector<uint8_t> UlHarqProcessesStatus_t;
 
struct tdtbfqsFlowPerf_t
{
    Time flowStart;               
    uint64_t packetArrivalRate;   
    uint64_t tokenGenerationRate; 
    uint32_t tokenPoolSize;       
    uint32_t maxTokenPoolSize;    
    int counter;                  
    uint32_t burstCredit; 
    int debtLimit; 
    uint32_t creditableThreshold; 
};
 
class TdTbfqFfMacScheduler : public FfMacScheduler
{
  public:
    TdTbfqFfMacScheduler();
 
    ~TdTbfqFfMacScheduler() override;
 
    // inherited from Object
    void DoDispose() override;
    static TypeId GetTypeId();
 
    // inherited from FfMacScheduler
    void SetFfMacCschedSapUser(FfMacCschedSapUser* s) override;
    void SetFfMacSchedSapUser(FfMacSchedSapUser* s) override;
    FfMacCschedSapProvider* GetFfMacCschedSapProvider() override;
    FfMacSchedSapProvider* GetFfMacSchedSapProvider() override;
 
    // FFR SAPs
    void SetLteFfrSapProvider(LteFfrSapProvider* s) override;
    LteFfrSapUser* GetLteFfrSapUser() override;
 
    friend class MemberCschedSapProvider<TdTbfqFfMacScheduler>;
    friend class MemberSchedSapProvider<TdTbfqFfMacScheduler>;
 
    void TransmissionModeConfigurationUpdate(uint16_t rnti, uint8_t txMode);
 
  private:
    //
    // Implementation of the CSCHED API primitives
    // (See 4.1 for description of the primitives)
    //
 
    void DoCschedCellConfigReq(
        const struct FfMacCschedSapProvider::CschedCellConfigReqParameters& params);
 
    void DoCschedUeConfigReq(
        const struct FfMacCschedSapProvider::CschedUeConfigReqParameters& params);
 
    void DoCschedLcConfigReq(
        const struct FfMacCschedSapProvider::CschedLcConfigReqParameters& params);
 
    void DoCschedLcReleaseReq(
        const struct FfMacCschedSapProvider::CschedLcReleaseReqParameters& params);
 
    void DoCschedUeReleaseReq(
        const struct FfMacCschedSapProvider::CschedUeReleaseReqParameters& params);
 
    //
    // Implementation of the SCHED API primitives
    // (See 4.2 for description of the primitives)
    //
 
    void DoSchedDlRlcBufferReq(
        const struct FfMacSchedSapProvider::SchedDlRlcBufferReqParameters& params);
 
    void DoSchedDlPagingBufferReq(
        const struct FfMacSchedSapProvider::SchedDlPagingBufferReqParameters& params);
 
    void DoSchedDlMacBufferReq(
        const struct FfMacSchedSapProvider::SchedDlMacBufferReqParameters& params);
 
    void DoSchedDlTriggerReq(
        const struct FfMacSchedSapProvider::SchedDlTriggerReqParameters& params);
 
    void DoSchedDlRachInfoReq(
        const struct FfMacSchedSapProvider::SchedDlRachInfoReqParameters& params);
 
    void DoSchedDlCqiInfoReq(
        const struct FfMacSchedSapProvider::SchedDlCqiInfoReqParameters& params);
 
    void DoSchedUlTriggerReq(
        const struct FfMacSchedSapProvider::SchedUlTriggerReqParameters& params);
 
    void DoSchedUlNoiseInterferenceReq(
        const struct FfMacSchedSapProvider::SchedUlNoiseInterferenceReqParameters& params);
 
    void DoSchedUlSrInfoReq(const struct FfMacSchedSapProvider::SchedUlSrInfoReqParameters& params);
 
    void DoSchedUlMacCtrlInfoReq(
        const struct FfMacSchedSapProvider::SchedUlMacCtrlInfoReqParameters& params);
 
    void DoSchedUlCqiInfoReq(
        const struct FfMacSchedSapProvider::SchedUlCqiInfoReqParameters& params);
 
    int GetRbgSize(int dlbandwidth);
 
    unsigned int LcActivePerFlow(uint16_t rnti);
 
    double EstimateUlSinr(uint16_t rnti, uint16_t rb);
 
    void RefreshDlCqiMaps();
    void RefreshUlCqiMaps();
 
    void UpdateDlRlcBufferInfo(uint16_t rnti, uint8_t lcid, uint16_t size);
    void UpdateUlRlcBufferInfo(uint16_t rnti, uint16_t size);
 
    uint8_t UpdateHarqProcessId(uint16_t rnti);
 
    bool HarqProcessAvailability(uint16_t rnti);
 
    void RefreshHarqProcesses();
 
    Ptr<LteAmc> m_amc; 
 
    std::map<LteFlowId_t, FfMacSchedSapProvider::SchedDlRlcBufferReqParameters> m_rlcBufferReq;
 
    std::map<uint16_t, tdtbfqsFlowPerf_t> m_flowStatsDl;
 
    std::map<uint16_t, tdtbfqsFlowPerf_t> m_flowStatsUl;
 
    std::map<uint16_t, uint8_t> m_p10CqiRxed;
    std::map<uint16_t, uint32_t> m_p10CqiTimers;
 
    std::map<uint16_t, SbMeasResult_s> m_a30CqiRxed;
    std::map<uint16_t, uint32_t> m_a30CqiTimers;
 
    std::map<uint16_t, std::vector<uint16_t>> m_allocationMaps;
 
    std::map<uint16_t, std::vector<double>> m_ueCqi;
    std::map<uint16_t, uint32_t> m_ueCqiTimers;
 
    std::map<uint16_t, uint32_t> m_ceBsrRxed;
 
    // MAC SAPs
    FfMacCschedSapUser* m_cschedSapUser;         
    FfMacSchedSapUser* m_schedSapUser;           
    FfMacCschedSapProvider* m_cschedSapProvider; 
    FfMacSchedSapProvider* m_schedSapProvider;   
 
    // FFR SAPs
    LteFfrSapUser* m_ffrSapUser;         
    LteFfrSapProvider* m_ffrSapProvider; 
 
    // Internal parameters
    FfMacCschedSapProvider::CschedCellConfigReqParameters
        m_cschedCellConfig; 
 
    uint16_t m_nextRntiUl; 
 
    uint32_t m_cqiTimersThreshold; 
 
    std::map<uint16_t, uint8_t> m_uesTxMode; 
 
    uint64_t bankSize; 
 
    int m_debtLimit; 
 
    uint32_t m_creditLimit; 
 
    uint32_t m_tokenPoolSize; 
 
    uint32_t m_creditableThreshold; 
 
    // HARQ attributes
    bool m_harqOn;
    std::map<uint16_t, uint8_t> m_dlHarqCurrentProcessId; 
    // HARQ status
    //  0: process Id available
    //  x>0: process Id equal to `x` transmission count
    std::map<uint16_t, DlHarqProcessesStatus_t> m_dlHarqProcessesStatus; 
    std::map<uint16_t, DlHarqProcessesTimer_t> m_dlHarqProcessesTimer;   
    std::map<uint16_t, DlHarqProcessesDciBuffer_t>
        m_dlHarqProcessesDciBuffer; 
    std::map<uint16_t, DlHarqRlcPduListBuffer_t>
        m_dlHarqProcessesRlcPduListBuffer;                 
    std::vector<DlInfoListElement_s> m_dlInfoListBuffered; 
 
    std::map<uint16_t, uint8_t> m_ulHarqCurrentProcessId; 
    // HARQ status
    //  0: process Id available
    //  x>0: process Id equal to `x` transmission count
    std::map<uint16_t, UlHarqProcessesStatus_t> m_ulHarqProcessesStatus; 
    std::map<uint16_t, UlHarqProcessesDciBuffer_t>
        m_ulHarqProcessesDciBuffer; 
 
    // RACH attributes
    std::vector<struct RachListElement_s> m_rachList; 
    std::vector<uint16_t> m_rachAllocationMap;        
    uint8_t m_ulGrantMcs;                             
};
 
} // namespace ns3
 
#endif /* TDTBFQ_FF_MAC_SCHEDULER_H */